Computer architecture and the hardware/software interface

Computer architecture—sometimes called “computer organization”—is an important first look at computing from below the software surface. In our experience it is the most neglected area among self-taught software engineers.

The course is scoped as an introduction to the topic, designed for software engineers who want to be better software engineers, rather than prospective hardware designers (the target audience of many computer architecture courses).

The focus is on building a strong mental model of the actual execution of programs by a microprocessor, so that students may better reason about the code they write. This manifests most clearly as the ability to write faster code, whether by better understanding the available instruction set, by reasoning more clearly about branch prediction or cache coherence, or by understanding the limits of parallel execution.

Topics covered

  • Binary representations of data
  • Quick review of C
  • The MIPS architecture
  • Compiling, assembling, linking and loading
  • Typical components of a microprocessor
  • The MIPS datapath and single cycle control
  • Pipelining and its hazards
  • Multilevel caches (L1, L2 etc)
  • Parallelism, the Flynn taxonomy, Amdahl’s law and an overview of GPU architectures


This course presumes strong programming abilities, and some familiarity with C. It will include a brief review of C, but students are advised to be familiar enough to say solve an exercise in K&R C without much outside assistance. Some familiarity with an assembly language is advised but not assumed.

Schedule and fees

This course is next scheduled to run in April 2017. Apply now to be considered; exact dates and times will be finalized based on participant availability. Classes will be approximately nine hours per week for three weeks, for a total price of $1,800

San Francisco, California
© 2016 Bradfield School of Computer Science